Quality

External appearance inspection is the most basic test carried out by a third party test laboratory, which includes checking the number of parts, internal and external packaging and preservation measures to meet requirements. Then verify that the chip's surface is correct as well as the manufacturer's identification location and printed fonts (including date codes and country of origin).

All types of devices have different functions, so they need to be tested differently. the third party test lab will use the semiconductor tube characteristic diagram to check whether the chip is damaged by open circuit or short circuit test.

Because of different levels of testing, so we will check to the device pins and related instructions specified by the manufacturer in datasheet.

According to the laboratory's description, an environment can be created and programmed by testing instruments to detect whether a particular chip is programmable or functionally damaged. The third party lab will provide professional test results including FPGA, SPLD, CPLD, EPLD, MicroController, MCU and Standard Logic Device Detection.

(X-Ray) Inspection testing is a real-time non-destructive analysis to check the hardware components inside the components. It mainly checks the lead frame of the chip, wafer size, gold wire binding diagram, ESD damage and holes. Customers can provide available samples or remainder of an advance purchase for comparative inspection.

Solderability testing is used to predict the success of the soldering process before the large investment of assembly has taken place. Once several parts costing several hundreds of dollars or more are assembled and soldering is attempted, it is very expensive (and makes no sense) to discover that the unit will not function because one individual part did not solder. Hence, solderability testing is performed prior to assembly on the individual components to be joined to show the probability of soldering success.

It mainly uses various laboratory testing instruments to corrode the package on the chip surface to obtain the internal wafer structure, so as to check whether there is a wafer inside, whether it meets the standard wafer and a manufacturer's identity, marked copyright year and the wafer code.

Because of different levels of testing, so we will check to the device pins and related instructions specified by the manufacturer in datasheet.